Design for Manufacturing (DFM)
SigmaTron International provides customers with a plan to both
improve quality and reduce manufacturing costs by employing a Design
for Manufacturability (DFM) Review using Valor's vPlan Software
with access to Valor Part Library . This system integrates all incoming
logistical and engineering data into a single database for efficient
pre-production and communication.
Once all of the relevant data (bill of material, AVL, Gerbers, etc.) is captured,
the system is programmed to analyze and optimize for manufacturability and assembly.
Design verification is performed based on pre-defined manufacturing constraints.
As a result of the verification process, productivity is improved, component
and manufacturing resources are optimized, and the final product is far more reliable.
Design for Testability (DFT) Analysis:
Increased PCB assembly complexity requires that testability be a major part of
the design process. Designing a PCB assembly with test in mind will provide a
better solution to rework and repair and allow lower production costs and
higher yields with fast turn times.
In-circuit test:
Verifies the correct assembly and operation of each board component, while the
component is within the assembled circuit board. A bed-of-nails fixture with
supporting test-programming code is used to access all electrical nets on the
assembly. The test isolates faults to the component pin, identifies shorts on
unconnected output pins, verifies the correct value of analog components and
the correct placement and soldering of digital components including ASICs.
Functional test:
Functionality of the final product can be tested to our customer's
specifications using customer-furnished test equipment or special test
equipment and specifications developed by the SigmaTron International team.
Technicians test for any abnormalities in the assembly, through
all stages of development, to verify the assembly will function as intended
and to increase confidence in the functionality.
Boundary Scan Test: Memory & Non-Memory Devices
Verifies data line testing is done by applying walking
one and walking zero patterns to the data lines. These
values can be written and read directly. The idea of walking
patterns allow detection of single stuck at faults as well as
bridging faults between data lines.
